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Address Range | Functionality |
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0000-BFFF | User RAM (FLEX applications run here) |
C000-DFFF | User RAM (FLEX DOS runs here) |
E000 | Exit key - write WINDOWS here in ASCII |
E001 | Abort key - write ABORT here in ASCII |
E002 | Flush key - write FLUSH here in ASCII |
E003 | Case flip key - flips every time you write it |
E004 | ACIA Control Register |
E005 | ACIA Data Port |
E006 | ACIA Control Register (Comm 1-4, if selected) |
E007 | ACIA Data Port (Comm 1-4, if selected) |
E008 | Mirror of E004 (ACIA Control Register) |
E009 | Mirror of E005 (ACIA Data Port) |
E00A | User r/w port 1; 1 bits = LED's red (both=yellow) |
E00B | User r/w port 2; 1 bits = LED's green (both=yellow) |
E00C | Read-only emulator major ID (version) |
E00D | Read-only emulator minor ID (revision) |
E00E-E00F | Reserved for future I/O, presently RAM |
E010-E01F | Emulator custom weirdness: Do Not Access! |
E020 | RTC: Hundreds of years (IE 19 of 1997) |
E021 | RTC: Tens & Ones of years (IE 97 of 1997) |
E022 | RTC: Month (1=Jan) |
E023 | RTC: Day of month (1-31) |
E024 | RTC: Day of week (0-6, 0=Sunday) |
E025 | RTC: Hour of day (1-24) |
E026 | RTC: Minute of hour (0-59) |
E027 | RTC: Seconds of Minute (0-59) |
E028 | RTC: Strobe… takes snapshot of the time |
E029 | Chunky code switch. R/W: 1=chunky 0=not. |
E02A-E02F | Reserved for future I/O, presently RAM |
E030 | VIA1 DATB Port B data register |
E031 | VIA1 DATA Port A data register |
E032 | VIA1 DDRB Port B data direction register |
E033 | VIA1 DDRA Port A data direction register |
E034 | VIA1 T1CL Timer 1 counter (low) |
E035 | VIA1 T1CH Timer 1 counter (high) |
E036 | VIA1 T1LL Timer 1 latch (low) |
E037 | VIA1 T1LH Timer 1 latch (high) |
E038 | VIA1 T2CL Timer 2 counter (low) |
E039 | VIA1 T2CH Timer 2 counter (high) |
E03A | VIA1 SFTR Shift Register |
E03B | VIA1 ACRG Auxillary control register |
E03C | VIA1 PCRG Peripheral control register |
E03D | VIA1 IFRG interrupt flag register |
E03E | VIA1 IERG interupt enable register |
E03F | VIA1 DXTA port A data register (w/o handshake) |
E040 | VIA2 DATB Port B data register |
E041 | VIA2 DATA Port A data register |
E042 | VIA2 DDRB Port B data direction register |
E043 | VIA2 DDRA Port A data direction register |
E044 | VIA2 T1CL Timer 1 counter (low) |
E045 | VIA2 T1CH Timer 1 counter (high) |
E046 | VIA2 T1LL Timer 1 latch (low) |
E047 | VIA2 T1LH Timer 1 latch (high) |
E048 | VIA2 T2CL Timer 2 counter (low) |
E049 | VIA2 T2CH Timer 2 counter (high) |
E04A | VIA2 SFTR Shift Register |
E04B | VIA2 ACRG Auxillary control register |
E04C | VIA2 PCRG Peripheral control register |
E04D | VIA2 IFRG interrupt flag register |
E04E | VIA2 IERG interupt enable register |
E04F | VIA2 DXTA port A data register (w/o handshake) |
E050 | VIA3 DATB Port B data register (Upper DIP Switch) |
E051 | VIA3 DATA Port A data register (Lower DIP Switch) |
E052 | VIA3 DDRB Port B data direction register |
E053 | VIA3 DDRA Port A data direction register |
E054 | VIA3 T1CL Timer 1 counter (low) |
E055 | VIA3 T1CH Timer 1 counter (high) |
E056 | VIA3 T1LL Timer 1 latch (low) |
E057 | VIA3 T1LH Timer 1 latch (high) |
E058 | VIA3 T2CL Timer 2 counter (low) |
E059 | VIA3 T2CH Timer 2 counter (high) |
E05A | VIA3 SFTR Shift Register |
E05B | VIA3 ACRG Auxillary control register |
E05C | VIA3 PCRG Peripheral control register |
E05D | VIA3 IFRG interrupt flag register |
E05E | VIA3 IERG interupt enable register |
E05F | VIA3 DXTA port a data register (w/o handshake) |
E060-E7FF | Reserved for future I/O, presently RAM |
E800-F37F | User RAM (Unused by FLEX and Monitor) |
F380-F7FF | RAM (used by Psymon monitor… do not disturb) |
F800-FFEF | ROM (Psymon) Monitor code; See PSYMON.TXT |
FFF0-FFFF | ROM (Psymon) Interrupt & Reset vectors |
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