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The 'A' accumulator (A) 8 bit
The 'B' accumulator (B) 8 bit
The Condition Code register (CC) 8 bit
The Direct Page register (DP) 8 bit
The 'X' index register (X) 16 bit
The 'Y' index register (Y) 16 bit
The User stack pointer (U) 16 bit
The System stack pointer (5) 16 bit
The Program Counter (PC) 16 bit
The A and B accumulators can often be referenced as one 16-bit register represented by a 'D' (for Double-accumulator). In these cases, the A accumulator is the most significant half.
Examples:
LDA [,X] loads A from the address pointed to by X
LDX [D,U] loads X from the address pointed to by (U)+(D)
If auto-increment or auto-decrement addressing is done in an indirect fashion, they must be a double increment (two plus signs) or double decrement (two minus signs).
Example:
LEAX STRING,PCR
this instruction determines the offset
between the PC and STRING and uses it
as an offset for the PC register to
determine the effective address
LDX BUFPNT
would be assembled with direct addressing. If we wished to force extended addressing we could simply enter:
LDX >BUFPNT
and the assembler would use extended addressing.
The same capability exists for forcing direct addressing by preceding the operand with a less than sign ('<'). For example:
LDX <BUFPNT
would force direct addressing. Note that in both cases the greater than or less than sign must be the first character in the operand.
(P) | Operand containing immediate, extended, direct, or indexed addressing. |
(Q) | Operand containing extended, direct, or indexed addressing. |
(T) | Operand containing indexed addressing only. |
R | Any register specification: A, B, X, Y, U, S, PC, CC, DP, or D. |
dd | 8 bit data value |
dddd | 16 bit data value |
SOURCE FORM: ABX
ADC Add with carry into register
SOURCE FORM: ADCA (P); ADCB (P)
6800 ALTERNATES: ADC A (P); ADC B (P)
ADD Add into register
SOURCE FORM: ADDA (P); ADDB (P); ADDD (P)
6800 ALTERNATES: ADD A (P); ADD B (P)
AND Logical 'AND' into register
SOURCE FORM: ANDA (P); ANDB (P)
6800 ALTERNATES: AND A (P); AND B (P)
ANDCC Logical 'AND' immediate into CC
SOURCE FORM: ANDCC #dd
ASL Arithmetic shift left
SOURCE FORM: ASLA; ASLB; ASL (Q)
6800 ALTERNATES: ASL A; ASL B
ASR Arithmetic shift right
SOURCE FORM: ASRA; ASRB; ASR (Q)
6800 ALTERNATES: ASR A; ASR B
BCC, LBCC Branch (short or long) if carry clear
SOURCE FORM: BCC dd; LBCC dddd
BCS, LBCS Branch (short or long) if carry set
SOURCE FORM: BCS dd; LBCS dddd
BEQ, LBEQ Branch (short or long) if equal
SOURCE FORM: BEQ dd; LBEQ dddd
BGE, LBGE Branch (short or long) if greater than or equal
SOURCE FORM: BGE dd; LBGE dddd
BGT, LBGT Branch (short or long) if greater than
SOURCE FORM: BGT dd; LBGT dddd
BHI, LBHI Branch (short or long) if higher
SOURCE FORM: BHI dd; LBHI dddd
BHS, LBHS Branch (short or long) if higher or same
SOURCE FORM: BHS dd; LBHS dddd
BIT Bit test
SOURCE FORM: BITA (P); BITB (P)
6800 ALTERNATES: BIT A (P); BIT B (P)
BLE, LBLE Branch (short or long) if less than or equal to
SOURCE FORM: BLE dd; LBLE dddd
BLO, LBLO Branch (short or long) if lower
SOURCE FORM: BLO dd; LBLO dddd
BLS, LBLS Branch (short or long) if lower or same
SOURCE FORM: BLS dd; LBLS dddd
BLT, LBLT Branch (short or long) if less than
SOURCE FORM: BLT dd; LBLT dddd
BMI, LBMI Branch (short or long) if minus
SOURCE FORM: BMI dd; LBMI dddd
BNE, LBNE Branch (short or long) if not equal
SOURCE FORM: BNE dd; LBNE dddd
BPL, LBPL Branch (short or long) if plus
SOURCE FORM: BPL dd; LBPL dddd
BRA, LBRA Branch (short or long) always
SOURCE FORM: BRA dd; LBRA dddd
BRN, LBRN Branch (short or long) never
SOURCE FORM: BRN dd; LBRN dddd
BSR, LBSR Branch (short or long) to subroutine
SOURCE FORM: BSR dd; LBSR dddd
BVC, LBVC Branch (short or long) if overflow clear
SOURCE FORM: BVC dd; LBVC dddd
BVS, LBVS Branch (short or long) if overflow set
SOURCE FORM: BVS dd; LBVS dddd
CLR Clear
SOURCE FORM: CLRA; CLRB; CLR (Q)
6800 ALTERNATES: CLR A; CLR B
CMP Compare
SOURCE FORM: CMPA (P); CMPB (P); CMPD (P); CMPX (P); CMPY (P); CMPU (P); CMPS (P)
6800 ALTERNATES: CMP A (P); CMP B (P); CPX (P)
COM Complement (One's complement)
SOURCE FORM: COMA; COMB; COM (Q)
6800 ALTERNATES: COM A; COM B
CWAI Clear and wait for interrupt
SOURCE FORM: CWAI #dd
DAA Decimal adjust accumulator A
SOURCE FORM: DAA
DEC Decrement
SOURCE FORM: DECA, DECB, DEC (Q)
6800 ALTERNATES: DEC A; DEC B
EOR Exclusive 'OR'
SOURCE FORM: EORA (P); EORB (P)
6800 ALTERNATES: EOR A (P); EOR B (P)
EXG Exchange registers
SOURCE FORM: EXG Rl,R2
INC Increment
SOURCE FORM: INCA, INCB, INC (Q)
6800 ALTERNATES: INC A; INC B
JMP Jump to address
SOURCE FORM: JMP dddd
JSR Jump to subroutine at address
SOURCE FORM: JSR dddd
LD Load register from memory
SOURCE FORM: LDA (P); LDB (P); LDD (P); LDX (P); LDY (P); LDU (P); LDS (P)
6800 ALTERNATES: LDAA (P); LDAB (P); LDA A (P); LDA B (P)
LEA Load effective address
SOURCE FORM: LEAX (T); LEAY (T); LEAU (T); LEAS (T)
LSL Logical shift left
SOURCE FORM: LSLA; LSLB; LSL (Q)
LSR Logical shift right
SOURCE FORM: LSRA; LSRB; LSR (Q)
6800 ALTERNATES: LSR A; LSR B
MUL Multiply accumulators
SOURCE FORM: MUL
NEG Negate (Two's complement)
SOURCE FORM: NEGA; NEGB; NEG (Q)
6800 ALTERNATES: NEG A; NEG B
NOP No operation
SOURCE FORM: NOP
OR Inclusive 'OR' into register
SOURCE FORM: ORA (P); ORB (P)
6800 ALTERNATES: ORAA (P); ORAB (P); ORA A (P); ORA B (P)
ORCC Inclusive 'OR' immediate into CC
SOURCE FORM: ORCC #dd
PSHS Push registers onto system stack
SOURCE FORM: PSHS (register list); PSHS #dd
6800 ALTERNATES: PSRA; PSHB; PSH A; PSH B
PSHU Push registers onto user stack
SOURCE FORM: PSHU (register list); PSHU #dd
PULS Pull registers from system stack
SOURCE FORM: PULS (register list); PULS #dd
6800 ALTERNATES: PULA; PULB; PUL A; PUL B
PULU Pull registers from user stack
SOURCE FORM: PULU (register list); PULU #dd
ROL Rotate left
SOURCE FORM: ROLA; ROLB; ROL (Q)
6800 ALTERNATES: ROL A; ROL B
ROR Rotate right
SOURCE FORM: RORA; RORB; ROR (Q)
6800 ALTERNATES: ROR A; ROR B
RTI Return from interrupt
SOURCE FORM: RTI
RTS Return from subroutine
SOURCE FORM: RTS
SBC Subtract with borrow
SOURCE FORM: SBCA (P); SBCB (P);
6800 ALTERNATES: SBC A (P); SBC B (P)
SEX Sign extend
SOURCE FORM: SEX
ST Store register into memory
SOURCE FORM: STA (P); STB (P); STD (P); STX (P); STY (P); STU (P); STS (P)
6800 ALTERNATES: STAA (P); STAB (P); STA A (P); STA B (P)
SUB Subtract from register
SOURCE FORM: SUBA (P); SUBB (P); SUBD (P)
6800 ALTERNATES: SUB A (P); SUB B, (P)
SWI Software interrupt
SOURCE FORM: SWI
SWI2 Software interrupt 2
SOURCE FORM: SWI2
SWI3 Software interrupt 3
SOURCE FORM: SWI3
SYNC Synchronize to interrupt
SOURCE FORM: SYNC
TFR Transfer register to register
SOURCE FORM: TFR Rl,R2
TST Test
SOURCE FORM: TSTA; TSTB; TST (Q)
6800 ALTERNATES: TST A; TST B
CBA Compare B to A
CLC Clear carry bit
CLI Clear interrupt mask
CLV Clear overflow bit
DES Decrement stack pointer
DEX Decrement X
INS Increment stack pointer
INX Increment X
SBA Subtract B from A
SEC Set carry bit
SEI Set interrupt mask
SEV Set overflow bit
TAB Transfer A to B
TAP Transfer A to CC
TBA Transfer B to A
TPA Transfer CC to A
TSX Transfer S to X
TXS Transfer X to S
WAI Wait for interrupt
SIMULATED 6801 MNEMONICS ASLD Arithmetic shift left D
LSRD Logical shift right D
PSHX Push the X register
PULX Pull the X register
LDAD Load accumulator D from memory
STAD Store accumulator D into memory
BES,LBES Branch (short or long) if error set
CLF Clear FIRQ interrupt mask
CLZ Clear zero condition code bit
SEF Set FIRQ interrupt mask
SEZ Set zero condition code bit
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